`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer: Andrew Gallasch
// 
// Create Date:    09:10:28 10/24/2013 
// Design Name: 
// Module Name:    pseudoRandomInterrupter 
// Project Name: 
// Target Devices: 
// Tool versions: 
// Description: adapted from http://www.edaboard.com/thread32216.html
//
//	This generates a pseudo random bit sequence from a seed.
// It is inactive until a seed is written.
// Then the pseudo random bit is sent to the output.
//
// Dependencies: 
//
// Revision: 
// Revision 0.01 - File Created
// Additional Comments: 
//
//////////////////////////////////////////////////////////////////////////////////
module pseudoRandomInterrupter(
		input clk,
		input reset,
		input enable,
		input [3:0] address,
		input [31:0] dataIn,
		output [31:0] dataOut,
		input write,
		output done,
		output interrupt
    );

assign done = 0;

reg	[31:0]	G;

reg en;

initial en = 0;

always @(posedge clk)
begin
	if( reset )
	begin
		G <= 0;
		en <= 0;
	end
	if (write & enable)
	begin
		G <= dataIn;
		en <= 1;
	end
	else G <= {(G[0] ^ G[2] ^ G[6] ^ G[7]), G[31:1]};
end

assign dataOut = G;

assign interrupt = en & G[0];

endmodule

//http://www.edaboard.com/thread32216.html
